Resume of David Whipp

Employment

April 2003 - Jan 2011: NVIDIA Corp, Santa Clara, CA.

Job Title: Verification Architect

At NVIDIA I enjoy a challenging role developing the framework, flows, and tools used by verification teams verifying our Graphics Processors (GPUs)

November 2000 - March 2003: Fast-Chip, Sunnyvale. CA.

Verification Lead for Network Packet Classifier ASIC

January 1999 - October 2000: Infineon Technologies Corp. San Jose. CA.

Verification of TriCore: a hibrid CPU+DSP embedded core

August 1998 - January 1999: Siemens AG, Munich, Germany.

1989 - July 1998: GEC Plessey Semiconductor, Plymouth, UK.

Papers and Presentations

A full list of DV-related papers and presentations are here. Some highlights:
"Transaction Assertions in an Interface Definition Language"
Paper and Presentation at DesignCon 2008 (link)
"Traceability: from Transactions to RTL"
Presentation at ICCAD06 (link)
"A Multiparadigm Verification Flow"
Paper and Presentation at DesignCon 2006 (link)
"Experiences with RTL-Synchronized Transaction Reference Models"
Paper and Presentation at DesignCon 2003 (link)
I have been chair of the Verification Track at DesignCon from 2004 to present.

Education

1989 - 1993: UMIST, Manchester

Tools and Techniques

Programming Languages
C++ (including metatemplate programming)
Perl (strong Perl5 coding, with good understanding of upcoming Perl6)
Verilog and SystemVerilog (focus on testbench subset)
UML (and its predecessors such as Shlaer-Mellor OOA -- paper)
Javascript, Java, SQL, PHP, and related web technologies
Verification Architecture
Testbench architecture (including transaction assertions and coverage)
ESL Methodology
Object oriented design
Architecture for reliable distributed build systems
Metrics gathering and analyais
Miscellaneous
Perforce, Clearcase, CVS, SCCS version control systems
Non-trivial PLI programming (using VPI)
Z80, ARM, TriCore assembler programming


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