Resume of David Whipp

NOTE: This is an outdated (historical record) of my resume. An up to date resume is available here.

Personal Details

Name: David Peter Whipp
Nationality: British (H1B Visa)
Date of Birth: 12 September 1970
Address: Santa Clara. CA.


November 2000 - March 2003: Fast-Chip, Sunnyvale. CA.

Job Title: Senior Verification Engineer

In this job I lead our verification team and work to continuously enhance our methodology

January 1999 - October 2000: Infineon Technologies Corp. San Jose. CA.

August 1998 - January 1999: Siemens AG, Munich, Germany.

Testing of automotive microcontroller: memories and scan chains.

1989 - July 1998: GEC Plessey Semiconductor, Plymouth, UK.

(Acquired by Mitel Semiconductor in Feb 1998; currently in business as Zarlink Semiconductor)

November 1997 - July 1998: ASIC Systems Embedded Systems Group: Hardware Design Engineer

October 1996 - November 1997: ASIC Systems Embedded Systems Group, Systems Applications Engineer April 1996 - October 1996: Microprocessor Business Unit October 1993 - April 1996: CMOS Capability

Papers and Presentations

"Experiences with RTL-Synchronized Transaction Reference Models"
Paper and Presentation at DesignCon 2003
"Bottom-Up Modeling"
Presentation at Shlaer-Mellor User Group Conference (SMUG'02)
"Constructing High Level Macrocell Models using the Shlaer-Mellor Method"
Paper and Presentation at GPS Internal Technical Conference
Paper and Poster at European Solid State Circuits Conference (ESSCIRC'97)
"Splitting Domains and Constructing Bridges"
Paper and Presentation at Shlaer-Mellor User Group Conference (SMUG'97)


1989 - 1993: UMIST, Manchester

First Class Honours degree of MEng in Microelectronic Systems Engineering.

Tools and Techniques

Transaction-Based testbenches
Greenlight's "Pivot": a Perl interface to Verilog PLI
Construction of BFMs using Verilog HDL (previously, VHDL)
Exposure to SystemC, CynLib and TestBuilder C++ frameworks
Exposure to 'E' Language / Specman
Functional and Transaction modeling in C and C++
Shlaer-Mellor OOA and RD
OOD with GOF patterns; UML notation; XML representation
Verification Infrastructure
Scripting using Perl (also other Unix tools)
Techniques for fuzzy comparison of C-model Vs RTL simulations
Web-based systems for test-plan and regression result tracking
LSF and Condor job queuing systems
CVS, Continuus and Clearcase configuration management
GNATS bug-tracking system.
SES Objectbench and Aonix StP CASE Tools
Application and Applet progamming in Java (example)
Z80, ARM, TriCore assembler programming
System V IPC and Sockets network programming
IAL (HP Logic Analyzer programming language)
Abgen (Cadence layout manipulation tool)


Advanced Driving
I have an active interest in driver training and have taught Advanced Driving Techniques for improved road safety
Artificial Life & Artificial Intelligence
A long standing interest of mine has been the twin fields of artificial life and artificial intelligence. I selected a neural network project at University and have subsequently maintained an interest in this area. More recently, I have taken evening classes in psychology, to better understand the subject area.